JPH0445986B2 - - Google Patents

Info

Publication number
JPH0445986B2
JPH0445986B2 JP23464387A JP23464387A JPH0445986B2 JP H0445986 B2 JPH0445986 B2 JP H0445986B2 JP 23464387 A JP23464387 A JP 23464387A JP 23464387 A JP23464387 A JP 23464387A JP H0445986 B2 JPH0445986 B2 JP H0445986B2
Authority
JP
Japan
Prior art keywords
circuit board
lead frame
circuit
hole
bonding
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP23464387A
Other languages
English (en)
Japanese (ja)
Other versions
JPS6476747A (en
Inventor
Sadahisa Furuhashi
Motoji Kato
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Ibiden Co Ltd
Original Assignee
Ibiden Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ibiden Co Ltd filed Critical Ibiden Co Ltd
Priority to JP23464387A priority Critical patent/JPS6476747A/ja
Publication of JPS6476747A publication Critical patent/JPS6476747A/ja
Publication of JPH0445986B2 publication Critical patent/JPH0445986B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched

Landscapes

  • Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
  • Lead Frames For Integrated Circuits (AREA)
JP23464387A 1987-09-17 1987-09-17 Semiconductor mounting board Granted JPS6476747A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP23464387A JPS6476747A (en) 1987-09-17 1987-09-17 Semiconductor mounting board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP23464387A JPS6476747A (en) 1987-09-17 1987-09-17 Semiconductor mounting board

Publications (2)

Publication Number Publication Date
JPS6476747A JPS6476747A (en) 1989-03-22
JPH0445986B2 true JPH0445986B2 (en]) 1992-07-28

Family

ID=16974239

Family Applications (1)

Application Number Title Priority Date Filing Date
JP23464387A Granted JPS6476747A (en) 1987-09-17 1987-09-17 Semiconductor mounting board

Country Status (1)

Country Link
JP (1) JPS6476747A (en])

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2676112B2 (ja) * 1989-05-01 1997-11-12 イビデン株式会社 電子部品搭載用基板の製造方法
EP0496491A1 (en) * 1991-01-22 1992-07-29 National Semiconductor Corporation Leadless chip resistor capacitor carrier for hybrid circuits and a method of making the same

Also Published As

Publication number Publication date
JPS6476747A (en) 1989-03-22

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